PV4 リリース番号: 05
--------------------------------------------------------------------------------
Release 9.2.04i Trace
Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved.
D:\Xilinx92i\bin\nt\trce.exe -ise E:/RTL/_/PV.ise -intstyle ise -e 3 -s 4 -xml
PV PV.ncd -o PV.twr PV.pcf -ucf E:/RTL/Code/UCF/PV.ucf
Design file: pv.ncd
Physical constraint file: pv.pcf
Device,package,speed: xc3s200a,ft256,-4 (PRODUCTION 1.38 2007-10-19)
Report level: error report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
a 50 Ohm transmission line loading model. For the details of this model,
and for more information on accounting for different loading conditions,
please see the device datasheet.
================================================================================
Timing constraint: TS_pci_clock = PERIOD TIMEGRP "pci_clock" 30 ns HIGH 50%;
132346 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 18.219ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TS_video_clock = PERIOD TIMEGRP "video_clock" 13.48 ns HIGH
50%;
49411 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 11.752ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TS_clock_pci_ram_clock = PERIOD TIMEGRP
"clock_pci_ram_clock" TS_pci_clock / 3 HIGH 50%;
6451 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum period is 8.310ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_in_7" OFFSET = IN 6 ns VALID 6 ns BEFORE COMP
"in_pci_clock";
691 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum allowable offset is 5.999ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP
"in_pci_clock";
110 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Minimum allowable offset is 6.243ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP
"in_pci_clock";
84 items analyzed, 0 timing errors detected.
Minimum allowable offset is 9.899ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP
"in_pci_clock";
1 item analyzed, 0 timing errors detected.
Minimum allowable offset is 8.291ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE
COMP "in_video_clock" TIMEGRP video_rising;
16 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Offset is -0.071ns.
--------------------------------------------------------------------------------
================================================================================
Timing constraint: TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE
COMP "in_video_clock" TIMEGRP video_falling;
15 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
Offset is -6.822ns.
--------------------------------------------------------------------------------
All constraints were met.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Setup/Hold to clock in_pci_clock
-------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-------------+------------+------------+------------------+--------+
in_pci_gnt | 6.243(R)| -1.398(R)|clock_pci | 0.000|
in_pci_idsel | 1.886(R)| -0.246(R)|clock_pci | 0.000|
io_pci_ad<0> | 1.981(R)| -0.357(R)|clock_pci | 0.000|
io_pci_ad<1> | 1.984(R)| -0.361(R)|clock_pci | 0.000|
io_pci_ad<2> | 1.981(R)| -0.357(R)|clock_pci | 0.000|
io_pci_ad<3> | 1.984(R)| -0.361(R)|clock_pci | 0.000|
io_pci_ad<4> | 2.015(R)| -0.398(R)|clock_pci | 0.000|
io_pci_ad<5> | 1.991(R)| -0.368(R)|clock_pci | 0.000|
io_pci_ad<6> | 2.015(R)| -0.398(R)|clock_pci | 0.000|
io_pci_ad<7> | 1.991(R)| -0.368(R)|clock_pci | 0.000|
io_pci_ad<8> | 2.010(R)| -0.391(R)|clock_pci | 0.000|
io_pci_ad<9> | 2.004(R)| -0.385(R)|clock_pci | 0.000|
io_pci_ad<10>| 2.010(R)| -0.391(R)|clock_pci | 0.000|
io_pci_ad<11>| 1.974(R)| -0.349(R)|clock_pci | 0.000|
io_pci_ad<12>| 1.979(R)| -0.355(R)|clock_pci | 0.000|
io_pci_ad<13>| 1.994(R)| -0.373(R)|clock_pci | 0.000|
io_pci_ad<14>| 1.979(R)| -0.355(R)|clock_pci | 0.000|
io_pci_ad<15>| 1.996(R)| -0.375(R)|clock_pci | 0.000|
io_pci_ad<16>| 2.027(R)| -0.411(R)|clock_pci | 0.000|
io_pci_ad<17>| 2.021(R)| -0.404(R)|clock_pci | 0.000|
io_pci_ad<18>| 1.958(R)| -0.330(R)|clock_pci | 0.000|
io_pci_ad<19>| 1.968(R)| -0.342(R)|clock_pci | 0.000|
io_pci_ad<20>| 2.006(R)| -0.386(R)|clock_pci | 0.000|
io_pci_ad<21>| 2.006(R)| -0.386(R)|clock_pci | 0.000|
io_pci_ad<22>| 1.958(R)| -0.330(R)|clock_pci | 0.000|
io_pci_ad<23>| 1.968(R)| -0.342(R)|clock_pci | 0.000|
io_pci_ad<24>| 2.040(R)| -0.426(R)|clock_pci | 0.000|
io_pci_ad<25>| 1.951(R)| -0.322(R)|clock_pci | 0.000|
io_pci_ad<26>| 1.954(R)| -0.326(R)|clock_pci | 0.000|
io_pci_ad<27>| 1.920(R)| -0.285(R)|clock_pci | 0.000|
io_pci_ad<28>| 2.041(R)| -0.428(R)|clock_pci | 0.000|
io_pci_ad<29>| 1.920(R)| -0.285(R)|clock_pci | 0.000|
io_pci_ad<30>| 2.041(R)| -0.428(R)|clock_pci | 0.000|
io_pci_ad<31>| 2.028(R)| -0.412(R)|clock_pci | 0.000|
io_pci_cbe<0>| 4.759(R)| -0.385(R)|clock_pci | 0.000|
io_pci_cbe<1>| 4.235(R)| -0.349(R)|clock_pci | 0.000|
io_pci_cbe<2>| 4.530(R)| -0.379(R)|clock_pci | 0.000|
io_pci_cbe<3>| 5.372(R)| -0.322(R)|clock_pci | 0.000|
io_pci_devsel| 5.999(R)| -0.120(R)|clock_pci | 0.000|
io_pci_frame | 5.944(R)| -0.018(R)|clock_pci | 0.000|
io_pci_irdy | 5.785(R)| -0.820(R)|clock_pci | 0.000|
io_pci_stop | 5.968(R)| -0.491(R)|clock_pci | 0.000|
io_pci_trdy | 5.985(R)| -0.149(R)|clock_pci | 0.000|
-------------+------------+------------+------------------+--------+
Setup/Hold to clock in_video_clock
-------------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
-------------------+------------+------------+------------------+--------+
in_video_data<0> | -0.157(R)| 1.704(R)|clock_video | 0.000|
| -6.897(F)| 8.444(F)|clock_video | 6.740|
in_video_data<1> | -0.123(R)| 1.664(R)|clock_video | 0.000|
| -6.863(F)| 8.404(F)|clock_video | 6.740|
in_video_data<2> | -0.104(R)| 1.641(R)|clock_video | 0.000|
| -6.844(F)| 8.381(F)|clock_video | 6.740|
in_video_data<3> | -0.091(R)| 1.626(R)|clock_video | 0.000|
| -6.831(F)| 8.366(F)|clock_video | 6.740|
in_video_data<4> | -0.091(R)| 1.626(R)|clock_video | 0.000|
| -6.831(F)| 8.366(F)|clock_video | 6.740|
in_video_data<5> | -0.085(R)| 1.620(R)|clock_video | 0.000|
| -6.825(F)| 8.360(F)|clock_video | 6.740|
in_video_data<6> | -0.114(R)| 1.653(R)|clock_video | 0.000|
| -6.854(F)| 8.393(F)|clock_video | 6.740|
in_video_data<7> | -0.123(R)| 1.664(R)|clock_video | 0.000|
| -6.863(F)| 8.404(F)|clock_video | 6.740|
in_video_data<8> | -0.087(R)| 1.621(R)|clock_video | 0.000|
| -6.827(F)| 8.361(F)|clock_video | 6.740|
in_video_data<9> | -0.087(R)| 1.621(R)|clock_video | 0.000|
| -6.827(F)| 8.361(F)|clock_video | 6.740|
in_video_data<10> | -0.082(R)| 1.615(R)|clock_video | 0.000|
| -6.822(F)| 8.355(F)|clock_video | 6.740|
in_video_data<11> | -0.082(R)| 1.615(R)|clock_video | 0.000|
| -6.822(F)| 8.355(F)|clock_video | 6.740|
in_video_data<12> | -0.157(R)| 1.704(R)|clock_video | 0.000|
| -6.897(F)| 8.444(F)|clock_video | 6.740|
in_video_data<13> | -0.097(R)| 1.633(R)|clock_video | 0.000|
| -6.837(F)| 8.373(F)|clock_video | 6.740|
in_video_data<14> | -0.118(R)| 1.658(R)|clock_video | 0.000|
| -6.858(F)| 8.398(F)|clock_video | 6.740|
in_video_horizontal| -0.071(R)| 1.603(R)|clock_video | 0.000|
-------------------+------------+------------+------------------+--------+
Clock in_pci_clock to Pad
-------------+------------+------------------+--------+
| clk (edge) | | Clock |
Destination | to PAD |Internal Clock(s) | Phase |
-------------+------------+------------------+--------+
io_pci_ad<0> | 8.892(R)|clock_pci | 0.000|
io_pci_ad<1> | 9.592(R)|clock_pci | 0.000|
io_pci_ad<2> | 9.078(R)|clock_pci | 0.000|
io_pci_ad<3> | 8.819(R)|clock_pci | 0.000|
io_pci_ad<4> | 8.089(R)|clock_pci | 0.000|
io_pci_ad<5> | 8.819(R)|clock_pci | 0.000|
io_pci_ad<6> | 8.313(R)|clock_pci | 0.000|
io_pci_ad<7> | 9.162(R)|clock_pci | 0.000|
io_pci_ad<8> | 8.550(R)|clock_pci | 0.000|
io_pci_ad<9> | 8.250(R)|clock_pci | 0.000|
io_pci_ad<10>| 8.355(R)|clock_pci | 0.000|
io_pci_ad<11>| 7.637(R)|clock_pci | 0.000|
io_pci_ad<12>| 8.516(R)|clock_pci | 0.000|
io_pci_ad<13>| 8.373(R)|clock_pci | 0.000|
io_pci_ad<14>| 8.040(R)|clock_pci | 0.000|
io_pci_ad<15>| 7.564(R)|clock_pci | 0.000|
io_pci_ad<16>| 7.763(R)|clock_pci | 0.000|
io_pci_ad<17>| 7.454(R)|clock_pci | 0.000|
io_pci_ad<18>| 8.383(R)|clock_pci | 0.000|
io_pci_ad<19>| 8.405(R)|clock_pci | 0.000|
io_pci_ad<20>| 7.779(R)|clock_pci | 0.000|
io_pci_ad<21>| 7.959(R)|clock_pci | 0.000|
io_pci_ad<22>| 9.413(R)|clock_pci | 0.000|
io_pci_ad<23>| 8.863(R)|clock_pci | 0.000|
io_pci_ad<24>| 9.894(R)|clock_pci | 0.000|
io_pci_ad<25>| 8.675(R)|clock_pci | 0.000|
io_pci_ad<26>| 9.664(R)|clock_pci | 0.000|
io_pci_ad<27>| 8.954(R)|clock_pci | 0.000|
io_pci_ad<28>| 9.899(R)|clock_pci | 0.000|
io_pci_ad<29>| 8.978(R)|clock_pci | 0.000|
io_pci_ad<30>| 9.525(R)|clock_pci | 0.000|
io_pci_ad<31>| 9.611(R)|clock_pci | 0.000|
io_pci_cbe<0>| 8.065(R)|clock_pci | 0.000|
io_pci_cbe<1>| 8.597(R)|clock_pci | 0.000|
io_pci_cbe<2>| 7.523(R)|clock_pci | 0.000|
io_pci_cbe<3>| 8.277(R)|clock_pci | 0.000|
io_pci_devsel| 8.290(R)|clock_pci | 0.000|
io_pci_frame | 7.322(R)|clock_pci | 0.000|
io_pci_irdy | 7.901(R)|clock_pci | 0.000|
io_pci_stop | 7.911(R)|clock_pci | 0.000|
io_pci_trdy | 7.901(R)|clock_pci | 0.000|
out_pci_par | 7.370(R)|clock_pci | 0.000|
out_pci_req | 8.291(R)|clock_pci | 0.000|
-------------+------------+------------------+--------+
Clock to Setup on destination clock in_pci_clock
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_pci_clock | 18.219| | 1.994| |
---------------+---------+---------+---------+---------+
Clock to Setup on destination clock in_video_clock
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
in_video_clock | 11.752| 3.685| | |
---------------+---------+---------+---------+---------+
TIMEGRP "pci_in_7" OFFSET = IN 6 ns VALID 6 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 5.981; Ideal Clock Offset To Actual Clock 0.008;
-------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-------------+------------+------------+---------+---------+-------------+
in_pci_idsel | 1.886(R)| -0.246(R)| 4.114| 0.246| 1.934|
io_pci_ad<0> | 1.981(R)| -0.357(R)| 4.019| 0.357| 1.831|
io_pci_ad<1> | 1.984(R)| -0.361(R)| 4.016| 0.361| 1.828|
io_pci_ad<2> | 1.981(R)| -0.357(R)| 4.019| 0.357| 1.831|
io_pci_ad<3> | 1.984(R)| -0.361(R)| 4.016| 0.361| 1.828|
io_pci_ad<4> | 2.015(R)| -0.398(R)| 3.985| 0.398| 1.794|
io_pci_ad<5> | 1.991(R)| -0.368(R)| 4.009| 0.368| 1.821|
io_pci_ad<6> | 2.015(R)| -0.398(R)| 3.985| 0.398| 1.794|
io_pci_ad<7> | 1.991(R)| -0.368(R)| 4.009| 0.368| 1.821|
io_pci_ad<8> | 2.010(R)| -0.391(R)| 3.990| 0.391| 1.800|
io_pci_ad<9> | 2.004(R)| -0.385(R)| 3.996| 0.385| 1.806|
io_pci_ad<10>| 2.010(R)| -0.391(R)| 3.990| 0.391| 1.800|
io_pci_ad<11>| 1.974(R)| -0.349(R)| 4.026| 0.349| 1.838|
io_pci_ad<12>| 1.979(R)| -0.355(R)| 4.021| 0.355| 1.833|
io_pci_ad<13>| 1.994(R)| -0.373(R)| 4.006| 0.373| 1.817|
io_pci_ad<14>| 1.979(R)| -0.355(R)| 4.021| 0.355| 1.833|
io_pci_ad<15>| 1.996(R)| -0.375(R)| 4.004| 0.375| 1.814|
io_pci_ad<16>| 2.027(R)| -0.411(R)| 3.973| 0.411| 1.781|
io_pci_ad<17>| 2.021(R)| -0.404(R)| 3.979| 0.404| 1.788|
io_pci_ad<18>| 1.958(R)| -0.330(R)| 4.042| 0.330| 1.856|
io_pci_ad<19>| 1.968(R)| -0.342(R)| 4.032| 0.342| 1.845|
io_pci_ad<20>| 2.006(R)| -0.386(R)| 3.994| 0.386| 1.804|
io_pci_ad<21>| 2.006(R)| -0.386(R)| 3.994| 0.386| 1.804|
io_pci_ad<22>| 1.958(R)| -0.330(R)| 4.042| 0.330| 1.856|
io_pci_ad<23>| 1.968(R)| -0.342(R)| 4.032| 0.342| 1.845|
io_pci_ad<24>| 2.040(R)| -0.426(R)| 3.960| 0.426| 1.767|
io_pci_ad<25>| 1.951(R)| -0.322(R)| 4.049| 0.322| 1.864|
io_pci_ad<26>| 1.954(R)| -0.326(R)| 4.046| 0.326| 1.860|
io_pci_ad<27>| 1.920(R)| -0.285(R)| 4.080| 0.285| 1.898|
io_pci_ad<28>| 2.041(R)| -0.428(R)| 3.959| 0.428| 1.766|
io_pci_ad<29>| 1.920(R)| -0.285(R)| 4.080| 0.285| 1.898|
io_pci_ad<30>| 2.041(R)| -0.428(R)| 3.959| 0.428| 1.766|
io_pci_ad<31>| 2.028(R)| -0.412(R)| 3.972| 0.412| 1.780|
io_pci_cbe<0>| 4.759(R)| -0.385(R)| 1.241| 0.385| 0.428|
io_pci_cbe<1>| 4.235(R)| -0.349(R)| 1.765| 0.349| 0.708|
io_pci_cbe<2>| 4.530(R)| -0.379(R)| 1.470| 0.379| 0.546|
io_pci_cbe<3>| 5.372(R)| -0.322(R)| 0.628| 0.322| 0.153|
io_pci_devsel| 5.999(R)| -0.120(R)| 0.001| 0.120| -0.060|
io_pci_frame | 5.944(R)| -0.018(R)| 0.056| 0.018| 0.019|
io_pci_irdy | 5.785(R)| -0.820(R)| 0.215| 0.820| -0.303|
io_pci_stop | 5.968(R)| -0.491(R)| 0.032| 0.491| -0.230|
io_pci_trdy | 5.985(R)| -0.149(R)| 0.015| 0.149| -0.067|
-------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | 5.999| -0.018| 0.001| 0.018| |
-------------+------------+------------+---------+---------+-------------+
TIMEGRP "pci_in_10" OFFSET = IN 9 ns VALID 9 ns BEFORE COMP "in_pci_clock";
Worst Case Data Window 4.845; Ideal Clock Offset To Actual Clock -0.680;
------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
------------+------------+------------+---------+---------+-------------+
in_pci_gnt | 6.243(R)| -1.398(R)| 2.757| 1.398| 0.680|
------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | 6.243| -1.398| 2.757| 1.398| |
------------+------------+------------+---------+---------+-------------+
TIMEGRP "video_in" OFFSET = IN 1.37 ns VALID 4.24 ns BEFORE COMP "in_video_clock" TIMEGRP video_rising;
Worst Case Data Window 1.633; Ideal Clock Offset To Actual Clock -0.138;
-------------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-------------------+------------+------------+---------+---------+-------------+
in_video_data<0> | -0.157(R)| 1.704(R)| 1.527| 1.166| 0.181|
in_video_data<1> | -0.123(R)| 1.664(R)| 1.493| 1.206| 0.144|
in_video_data<2> | -0.104(R)| 1.641(R)| 1.474| 1.229| 0.122|
in_video_data<3> | -0.091(R)| 1.626(R)| 1.461| 1.244| 0.109|
in_video_data<4> | -0.091(R)| 1.626(R)| 1.461| 1.244| 0.109|
in_video_data<5> | -0.085(R)| 1.620(R)| 1.455| 1.250| 0.103|
in_video_data<6> | -0.114(R)| 1.653(R)| 1.484| 1.217| 0.133|
in_video_data<7> | -0.123(R)| 1.664(R)| 1.493| 1.206| 0.144|
in_video_data<8> | -0.087(R)| 1.621(R)| 1.457| 1.249| 0.104|
in_video_data<9> | -0.087(R)| 1.621(R)| 1.457| 1.249| 0.104|
in_video_data<10> | -0.082(R)| 1.615(R)| 1.452| 1.255| 0.099|
in_video_data<11> | -0.082(R)| 1.615(R)| 1.452| 1.255| 0.099|
in_video_data<12> | -0.157(R)| 1.704(R)| 1.527| 1.166| 0.181|
in_video_data<13> | -0.097(R)| 1.633(R)| 1.467| 1.237| 0.115|
in_video_data<14> | -0.118(R)| 1.658(R)| 1.488| 1.212| 0.138|
in_video_horizontal| -0.071(R)| 1.603(R)| 1.441| 1.267| 0.087|
-------------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | -0.071| 1.704| 1.441| 1.166| |
-------------------+------------+------------+---------+---------+-------------+
TIMEGRP "video_in" OFFSET = IN -5.37 ns VALID 4.24 ns BEFORE COMP "in_video_clock" TIMEGRP video_falling;
Worst Case Data Window 1.622; Ideal Clock Offset To Actual Clock -0.143;
-----------------+------------+------------+---------+---------+-------------+
| | | Setup | Hold |Source Offset|
Source | Setup | Hold | Slack | Slack | To Center |
-----------------+------------+------------+---------+---------+-------------+
in_video_data<0> | -6.897(F)| 8.444(F)| 1.527| 1.166| 0.181|
in_video_data<1> | -6.863(F)| 8.404(F)| 1.493| 1.206| 0.144|
in_video_data<2> | -6.844(F)| 8.381(F)| 1.474| 1.229| 0.122|
in_video_data<3> | -6.831(F)| 8.366(F)| 1.461| 1.244| 0.109|
in_video_data<4> | -6.831(F)| 8.366(F)| 1.461| 1.244| 0.109|
in_video_data<5> | -6.825(F)| 8.360(F)| 1.455| 1.250| 0.103|
in_video_data<6> | -6.854(F)| 8.393(F)| 1.484| 1.217| 0.133|
in_video_data<7> | -6.863(F)| 8.404(F)| 1.493| 1.206| 0.144|
in_video_data<8> | -6.827(F)| 8.361(F)| 1.457| 1.249| 0.104|
in_video_data<9> | -6.827(F)| 8.361(F)| 1.457| 1.249| 0.104|
in_video_data<10>| -6.822(F)| 8.355(F)| 1.452| 1.255| 0.099|
in_video_data<11>| -6.822(F)| 8.355(F)| 1.452| 1.255| 0.099|
in_video_data<12>| -6.897(F)| 8.444(F)| 1.527| 1.166| 0.181|
in_video_data<13>| -6.837(F)| 8.373(F)| 1.467| 1.237| 0.115|
in_video_data<14>| -6.858(F)| 8.398(F)| 1.488| 1.212| 0.138|
-----------------+------------+------------+---------+---------+-------------+
Worst Case | | | | | |
Summary | -6.822| 8.444| 1.452| 1.166| |
-----------------+------------+------------+---------+---------+-------------+
TIMEGRP "pci_out_11" OFFSET = OUT 10 ns AFTER COMP "in_pci_clock";
Largest slack: 2.678 ns; Smallest slack: 0.101 ns; Relative Skew: 2.577 ns;
-----------------------------------------------+-------------+-------------+
PAD | Slack |Relative Skew|
-----------------------------------------------+-------------+-------------+
io_pci_ad<0> | 1.108| 1.570|
io_pci_ad<1> | 0.408| 2.270|
io_pci_ad<2> | 0.922| 1.756|
io_pci_ad<3> | 1.181| 1.497|
io_pci_ad<4> | 1.911| 0.767|
io_pci_ad<5> | 1.181| 1.497|
io_pci_ad<6> | 1.687| 0.991|
io_pci_ad<7> | 0.838| 1.840|
io_pci_ad<8> | 1.450| 1.228|
io_pci_ad<9> | 1.750| 0.928|
io_pci_ad<10> | 1.645| 1.033|
io_pci_ad<11> | 2.363| 0.315|
io_pci_ad<12> | 1.484| 1.194|
io_pci_ad<13> | 1.627| 1.051|
io_pci_ad<14> | 1.960| 0.718|
io_pci_ad<15> | 2.436| 0.242|
io_pci_ad<16> | 2.237| 0.441|
io_pci_ad<17> | 2.546| 0.132|
io_pci_ad<18> | 1.617| 1.061|
io_pci_ad<19> | 1.595| 1.083|
io_pci_ad<20> | 2.221| 0.457|
io_pci_ad<21> | 2.041| 0.637|
io_pci_ad<22> | 0.587| 2.091|
io_pci_ad<23> | 1.137| 1.541|
io_pci_ad<24> | 0.106| 2.572|
io_pci_ad<25> | 1.325| 1.353|
io_pci_ad<26> | 0.336| 2.342|
io_pci_ad<27> | 1.046| 1.632|
io_pci_ad<28> | 0.101| 2.577|
io_pci_ad<29> | 1.022| 1.656|
io_pci_ad<30> | 0.475| 2.203|
io_pci_ad<31> | 0.389| 2.289|
io_pci_cbe<0> | 1.935| 0.743|
io_pci_cbe<1> | 1.403| 1.275|
io_pci_cbe<2> | 2.477| 0.201|
io_pci_cbe<3> | 1.723| 0.955|
io_pci_devsel | 1.710| 0.968|
io_pci_frame | 2.678| 0.000|
io_pci_irdy | 2.099| 0.579|
io_pci_stop | 2.089| 0.589|
io_pci_trdy | 2.099| 0.579|
out_pci_par | 2.630| 0.048|
-----------------------------------------------+-------------+-------------+
TIMEGRP "pci_out_12" OFFSET = OUT 11 ns AFTER COMP "in_pci_clock";
Largest slack: 2.709 ns; Smallest slack: 2.709 ns; Relative Skew: 0.000 ns;
-----------------------------------------------+-------------+-------------+
PAD | Slack |Relative Skew|
-----------------------------------------------+-------------+-------------+
out_pci_req | 2.709| 0.000|
-----------------------------------------------+-------------+-------------+
Timing summary:
---------------
Timing errors: 0 Score: 0
Constraints cover 189125 paths, 0 nets, and 10631 connections
Design statistics:
Minimum period: 18.219ns (Maximum frequency: 54.888MHz)
Minimum input required time before clock: 6.243ns
Minimum output required time after clock: 9.899ns
Analysis completed TUE 11 MAR 13:27:58 2008
--------------------------------------------------------------------------------
Trace Settings:
-------------------------
Trace Settings
Peak Memory Usage: 149 MB